6502 and 65C02 Processor Addressing Modes

Addressing mode syntax:

    <mnemonic>
| implied or battery (IMP, ACC)
    <mnemonic> # <expression>
| Immediate (IMM)
    <mnemonic> <expression>
| (ZPG) (*)
    <mnemonic> <expression>
| absolute (ABS)
    <mnemonic> <expression> , X
| absolute indexed by X (ABS X)
    <mnemonic> <expression> , Y
| absolute indexed by Y (ABS Y)
    <mnemonic> <image> , X
| zero page indexed by X (ZPG X) (*)
    <mnemonic> <expression> , Y
| zero page indexed by Y (ZPG Y) (*)
    <mnemonic> ( <expression> , X )
| zero-page pre-indexed indirect by X (ZPGI X)
    <mnemonic> ( <expression> ) , Y
| zero page post-indexed indirect by Y (ZPGI Y)
    <mnemonic> <expression>
| relative (REL)
    <mnemonic> ( <expression> )
| absolute indirect (ABSI)
    <mnemonic> ( <expression> )
| indirect zero side (ZPGI) (65C02 only) (*)
    <mnemonic> ( <expression> , X )
| absolute indirect indexed by X (ABSI X) (only 65C02)
| (*) if the expression is a number between <–255, 255>

In addition, the 65C02 processor has two addressing modes for bitwise commands (SMB, RMB, and BBS, BBR):

`<SMB> | <RMB> # <expression> , <expression>` | bit number, address on zero page
`<BBS> | <BBR> # <expression> , <expression> , <expression>` | bit number, address on zero page, relative offset

Description of addressing modes

Implied or battery are modes that do not have explicit arguments. They are the default, e.g. for CLC – transfer marker, for LSR – battery.

Instant means entering a given (byte size) directly in program code, e.g. LDA #10,ADC #2.

A zero page indicates the address of a cell on a zero page (byte-sized address). In the specified cell on the zero page there is a given (argument) for the order, e.g. STA $80.

Absolute means entering a cell address (a word-sized address). In the specified cell there is a given (argument) for the order, e.g. ROL $1000.

Absolute indexed by X indicates the address of the cell (the address of the word size). The contents of the X register are added to the specified address.

Absolute indexed by Y indicates the address of the cell (the address of the word size). The contents of the Y-register are added to the given address.

A zero page indexed by X indicates the address of the cell on the null page (byte size a). The contents of the X register are added to the specified address.

A zero page indexed by Y indicates that the cell address is zero (byte-sized address). The contents of the Y-register are added to the specified address.

A zero page indirect by X indicates that the cell address on the zero page (byte-sized address). The contents of the X register are added to the specified address. This cell and the subsequent cell contain the address of the given (argument) for the order, e.g. AND ($A 4, X).

A zero page indirect that is post-indexed by Y indicates that the cell address is on the zero page (byte-sized address). This cell and the subsequent one contain the address to which the y-register contents is added.

Relative means entering as an argument the address to which the assembler calculates the distance from the current order. The result is a number with a character between –128 and 127.

Absolute indirect

Intermediate zero pages (65C02 only)

Absolute indirect indexed by X (only 65C02)